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Salicidation process for submicrometre gate MOSFET fabrication using a resistless electron beam lithography process
Journal article   Peer reviewed

Salicidation process for submicrometre gate MOSFET fabrication using a resistless electron beam lithography process

S Michel, E Lavallee, J Beauvais and J Mouine
Electronics letters, Vol.35(15), pp.1283-1284
22/07/1999
DOI: https://doi.org/10.1049/el:19990817

Abstract

Engineering Engineering, Electrical & Electronic Science & Technology Technology
Recently, a novel silicide direct write electron beam lithography (SiDWEL) process has been developed in order to achieve high resolution (50 nm) silicide structures without the need for any supplementary annealing step. This new lithography technique is used to fabricate N-type MOSFET devices with platinum silicide gates. The fabrication uses a mix and match approach to combine the SiDWEL process with conventional MOSFET fabrication techniques.

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