Abstract
In this work, we propose a spin-based voltage comparator using a hybrid spin-CMOS circuit model. In particular, we use a 3T-MTJ (threeterminal magnetic tunnel junction) model with an in-plane magnetic anisotropy (IMA) free layer employing a spin-orbit torque (SOT) based writing scheme in the thermal activation regime to demonstrate a comparator circuit with a resolution close to 50mV. The 3T-MTJ model of the comparator was validated against existing experimental results. In addition, we analyze the delay performance of the comparator along with matching the switching delay of the MTJ with an analytical model. We also discuss potential extensions to the model and general directions for future work. (C) 2020 Author(s).