Abstract
Deep-level transient spectroscopy (DLTS) has been applied to metal-insulator-semiconductor (MIS) capacitors fabricated on planar (1 0 0), planar (1 1 1) orientations and textured n-type silicon wafers. Low frequency direct plasma-enhanced chemical vapour deposition Si-SiNx interface properties with and without plasma NH3 pre-treatment, with and without rapid thermal annealing (RTA) have been investigated. It is shown that three different kinds of defect states are identified at the Si-SiNx interface. For the planar (1 0 0) surface, samples with plasma NH3 pre-treatment plus RTA show the lowest DLTS signals, which suggests the lowest overall interface states density. For planar (1 1 1) Si surfaces, plasma NH3 pre-treatment and RTA yield a small improvement. With the textured surface, the RTA step improves the surface passivation quality further but no obvious impact is found with plasma NH3 pre-treatment. Energy-dependent electron capture cross sections were also measured by small-pulse DLTS. The capture cross sections depend strongly on the energy level and decrease towards the conduction band edge.