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Combined Nanoscale and Device-Level Degradation Analysis of SiO(2) Layers of MOS Nonvolatile Memory Devices
Magazine article   Peer reviewed

Combined Nanoscale and Device-Level Degradation Analysis of SiO(2) Layers of MOS Nonvolatile Memory Devices

Mario Lanza, Marc Porti, Montserrat Nafria, Xavier Aymerich, Alessandro Sebastiani, Gabriella Ghidini, Anna Vedda and M. Fasoli
IEEE transactions on device and materials reliability, Vol.9(4), pp.529-536
01/12/2009

Abstract

Engineering Engineering, Electrical & Electronic Physical Sciences Physics Physics, Applied Science & Technology Technology

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